An electrical fuse is an important electronic element for trimming an electronic circuit of a semiconductor device.
JP-A-8-335674 (Patent Document 1) discloses a method of trimming a semiconductor device employing an electrical fuse.
For example, methods of trimming semiconductor device employing an electrical fuse have been used for purposes such as remedying a defect of a semiconductor memory device.
For example, a normal memory cell array is fabricated by disposing a multiplicity of normal semiconductor memory cells in the form of a matrix, and a redundant memory cell is also fabricated by disposing a multiplicity of redundant memory cells for remedy.
When any of the memory cells of the normal memory cell array has a defect, the defective memory cell is switched to a redundant memory cell.
The above approach is effective in achieving high yield of semiconductor memory devices.
Electrical fuses are widely used in applications involving switching of electrical connections in electronic circuits forming semiconductor devices other than repairing techniques including the step of switching a defective memory cell to a redundant memory cell as described above.
Recently, the trend toward logic circuits and CMOS image sensors having higher and increased functions has resulted in demands for electrical fuses with greater capacities.
The use of an electrical fuse having an increased capacity increases the size of a semiconductor chip employing the fuse and consequently results in the cost of the semiconductor chip.
For example, the resistance of a filament of an electrical fuse having a filament structure formed by a polysilicon layer and a high melting point metal silicide layer is changed by applying a pulse voltage to the filament.
For example, the operation is based on the fact that the resistance of the electrical fuse changes from an initial value to another value when electro migration is caused at the high melting point silicide layer and changes to still another value when the migration is continued into the phase of silicon melting.
When it is attempted to increase the capacity of an electrical fuse through the same process as described above with the shape of the filament kept unchanged, the area occupied by the fuse can increase.
In general, the area occupied by an electrical fuse may be reduced by processing the fuse with higher fineness, and a multiplicity of resistance values may be obtained by a fuse element having a MONOS structure which is provided by additional processing steps. However, such approaches result in the problem of a cost increase. A MONOS structure is a film having layers of a metal, an oxide, a nitride, another oxide, and a semiconductor.
JP-A-2006-25353 (Patent Document 2) discloses an electrical fuse module provided by connecting filaments in parallel and parallel-connecting a switching transistor for program control and a readout transistor to the filaments.
The electrical fuse module can provide information representing a greater number of values in the form of changes in the resistance of the parallel-connected filaments.
However, the configuration of the electrical fuse module disclosed in Patent Document 2 is disadvantageous in that changes in resistance cannot be accurately read out because resistance values can be obtained only through parallel readout from parallel-connected filaments.